Skip to main content

Digital Techniques_Descriptive Questions

 Descriptive Questions

1)Construct full adder circuit using K map.


2) Justify ‘NOR gate is called as universal gate’. Sketch relevant diagram.


3) Convert following Boolean equation to standard SOP form and implement using NAND-NAND logic.

(i) y = A B C + ABC D + A C D

(ii) y = PQ + PQR + PQ R


4)State the rules for BCD addition.


5)Draw two input OR gate, using ECL logic family (only diagram).


6)Realize full subtractor using K-map.


7)Describe positive and negative edge triggering methods of clock with their logic symbol.


8)Calculate the analog output of 4-bit DAC if the digital input is 1101. Assume VFS = 5V.


9)Draw the logic diagram of 4-bit SIPO shift register and explain its working principle.


10) Realize the following expression using K-map.

Y = f(A, B, C, D) = Σ m(0, 2, 3, 5, 6, 7, 10, 11) + d (8, 14, 15) and implement it.


11)Simplify the following expression using Boolean laws.

Y = (A + B) (A + C)

Y = ABC + ABC + ABC


12)Draw the circuit of master slave JK FF using NAND gate and list its advantages.


13)Convert the given binary number into decimal, hexadecimal, octal and grey code (10111101)2.


14) Implement the following function using demultiplexer.

F1 = Σ m(1, 2, 5, 6, 7, 11, 14)

F2 = π M (0, 1, 2, 5, 6, 7, 8, 11, 12, 15)


15)Design 32 : 1 multiplexer using 16 : 1 multiplexer and one 2 : 1 multiplexer.


16) Describe the working of BCD to 7 segment decoder with truth table and circuit diagram.


17)Design 3-bit synchronous counter and draw O/P waveform (only logic diagram, truth table and

waveforms expected).


18)Design 3 : 8 line decoder and give IC number for the same.


19)Write std SOP equation of given logical equation

(i) y = AB + BC

(ii) y = ABC + B


20)Minimize y = Sm (0, 5, 2, 8, 7, 10, 15, 13) using k-map.


21)Write Advantages of MUX and DE-MUX state their applications.


22)Draw circuit diagram of MOD-10 counter using T-FF.


23)Design a 3 : 8 line decoder with truth table and logic diagram and give IC No. for the same.


24) Convert the following :

i) (5C7)16 = (?)10

ii) (2598)10 = (?)16

iii) (10110)2 = (?)10 = (?)16.


25) Why NAND & NOR gates are called as an universal gates ? Realize OR gate using NAND gate.


26)Reduce the following Boolean expression using Boolean laws :

i) Y = AB + AB + AB + AB

ii) Y = ABC + ABC + ABC .


27)Realize the following function using demultiplexer :

i) F m (0, 1, 3, 7, 11, 13, 15) 1 = Σ

ii) F m (2, 4, 8, 10, 12) 2 = Σ .


28) Design MOD 10 asynchronous up counter, with its truth table and timing diagram.


29) Perform BCD addition :

(i) (45)10 + (33)10

(ii) (57)10 + (26)10


30) Simplify given SOP equation using K map Y = S  m (0, 1, 2, 3, 5, 7, 8, 9, 11).


31) Implement Y = f (A, B, C) = S m (0, 1, 2, 6, 7) using suitable De-MUX & logic gates.


32)Obtain : (i) 2’s complement of 110011       (ii) Gray code of 1101


33) Compare : (i) static and dynamic memory  (ii) volatile and non-volatile memory 


34)Identify function of following IC numbers :

(i) 74244 (ii) 74245

(iii) 74151 (iv) 74155  Describe any two of the above IC with its truth table.


35)What is priority encoder ? Draw the block diagram of priority encoder.


36) Realize the following function using De-multiplexer.

i) F1 = Σm (0, 1, 3, 7, 11, 13, 15)

ii) F2 = Σm (2, 4, 8, 10, 11).


37)What is the Race-around condition ? How it will be eliminated in J-K flip-flop ?


38) Draw the diagram of 3-bit twisted ring counter using J-K F/F. Also write its truth table.


39) With neat diagram write the working of serial in serial out shift register.


40) Draw S-R latch using NAND gates only, also write about the received output for each condition using truth table of S-R flip-flop.

Comments

Popular posts from this blog

Digital techniques__4 Bit Adder and Subtractor

Digital techniques_2marks questions

 Q.1) Attempt the following questions:- 10 Marks  (a) Draw the symbol and write the truth table of universal Gates. (b) In a 3 variable K’ Map if there are two quads, interpret the simplified output. (c) Define modulus of counter and write down the number of flips flops required to construct mod 7 counter (d) Construct OR gate using NOR gate. (e) Demonstrate with example the function of EQU directive.  (f) Find the number of address lines required for:  1. 2K RAM  2. 16K ROM

Digital Techniques_Four Marks Questions

Question Bank 1) Define following terms related to logic families : (i) Noise Margin (ii) FAN-OUT (iii) Propagation delay (iv) Power dissipation 2) State Demorgan’s theorem’s and prove both theorems using truth table. 3) State functions of preset, clear, clock and SR inputs related to SR flip flop. 4) Sketch diagram of 4 bit asynchronous counter using suitable flip flop. Sketch timing diagram. 5) Perform binary subtraction using 2’s complement method (11001)2 – (1010)2. 6) State DeMorgan’s theorems and prove by Truth-table method for two variables. 7) Give the expression of Grey code equivalent of 4-bit binary using K-map. 8) Draw the circuit diagram of 3-bit asynchronous up/down counter using T-FF. 9) Describe any four specifications of DAC. 10) Perform the following: (11011)2 × (11011)2 11) State the rules for BCD Addition explain with example. 12) Design Half adder using K-map and implement using gates. 13) Subtract (1101)2 from (1110)2 using 1’s & 2’s complement method. 14) Des...